Analysis and Design of a 3-Stage BJT Circuit

Let's solve this multi-stage transistor circuit problem. We have a differential pair, a gain stage, and an output stage. We need to design a current mirror and analyze the bias points.

Part A asks us to design a current mirror to provide the 0.5 milliamp bias current. Since the differential pair uses PNP transistors with emitters at the top, we need a PNP current mirror referenced to the positive rail.

The current is determined by the bias resistor $R_{bias}$. The reference current flows from $V_{CC}$, through the diode-connected transistor, through $R_{bias}$, to $-V_{EE}$.

Substituting the values: 12 volts minus 0.6 volts minus negative 12, all divided by 0.5 milliamps.

This simplifies to 23.4 volts over 0.5 milliamps, which gives us 46.8 kilo-ohms. We can use a standard 47k resistor.

Now for Part B. Let's find the bias currents starting with Stage 1. The tail current is 0.5 mA, which splits equally between $T_1$ and $T_2$.

We need the collector voltage of $T_2$ because it biases the next stage. The current flows down through the 20k resistor to $-12$V.

Plugging in the numbers gives us negative 7 volts.

Stage 2 is an emitter-degenerated Common Emitter amplifier. The base of $T_3$ is connected to $V_{C2}$, so the base voltage is -7 V.